Unfortunately SiFli didn’t add support to OpenOCD to their chips (seems like they are planing to add support to probe-rs project). Instead they have used JLink and created support to an old JLink version (6.80a) and all the instructions are from Windows.
So these are my steps to get it working on Linux (not completely successful yet)
$ dpkg -l jlink
ii jlink 8.12.1 amd64 SEGGER J-Link tools
$ sudo apt purge jlink
$ sudo dpkg -i JLink_Linux_V680a_x86_64.deb
$ cd SiFli-SDK/tools/flash/jlink_drv$
$ ls
JLinkDevices.xml sf32lb52x_sd sf32lb56x_nand sf32lb58x_nand_nobbm
sf32lb52x sf32lb55x sf32lb56x_sd sf32lb58x_sd
sf32lb52x_nand sf32lb55x_sd sf32lb58x
sf32lb52x_nand_nobbm sf32lb56x sf32lb58x_nand
$ sudo mkdir /opt/SEGGER/JLink_V680a/Devices/SiFli
$ sudo cp -a * /opt/SEGGER/JLink_V680a/Devices/SiFli/Update: I discovered that I can use recent JLink 8.x with generic ARM Cortex-M33 to get this device recognized and to download firmware, however for debugging I still need that old version.
$ sudo JLinkExe -if swd
[sudo] password for alan:
SEGGER J-Link Commander V8.10f (Compiled Nov 6 2024 16:11:03)
DLL version V8.10f, compiled Nov 6 2024 16:09:58
Connecting to J-Link via USB...O.K.
Firmware: J-Link V11 compiled Dec 4 2024 17:53:35
Hardware version: V11.00
J-Link uptime (since boot): 0d 00h 00m 42s
S/N: 51005404
License(s): GDB
USB speed mode: High speed (480 MBit/s)
VTref=3.300V
Type "connect" to establish a target connection, '?' for help
J-Link>con
Please specify device / core. <Default>: CORTEX-M33
Type '?' for selection dialog
Device>
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>
Device "CORTEX-M33" selected.
Connecting to target via SWD
Found SW-DP with ID 0x0BE12477
DPIDR: 0x0BE12477
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x1AEB0015, ADDR: 0x00000000)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FD214. Implementer code: 0x41 (ARM)
Feature set: Mainline
Cache: L1 I/D-cache present
Found Cortex-M33 r0p4, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
Security extension: not implemented
CoreSight components:
ROMTbl[0] @ E00FF000
[0][0]: E000E000 CID B105900D PID 001F5132 DEVARCH 47702A04 DEVTYPE 00 ???
[0][1]: E0001000 CID B105900D PID 000F5132 DEVARCH 47701A02 DEVTYPE 00 DWT
[0][2]: E0002000 CID B105900D PID 000F5132 DEVARCH 47701A03 DEVTYPE 00 FPB
[0][3]: E0000000 CID B105900D PID 000F5132 DEVARCH 47701A01 DEVTYPE 43 ITM
I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 16 KB, 128 Sets, 32 Bytes/Line, 4-Way
Memory zones:
Zone: "Default" Description: Default access mode
Cortex-M33 identified.
J-Link>Saving the firmware from flash:
J-Link>savebin /tmp/ptab.bin, 0x62000000, 0x20000
Opening binary file for writing... [/tmp/ptab.bin]
Reading 131072 bytes from addr 0x62000000 into file...O.K.
J-Link>savebin /tmp/bl.bin, 0x62020000, 0x40000
Opening binary file for writing... [/tmp/bl.bin]
Reading 262144 bytes from addr 0x62020000 into file...O.K.
J-Link>savebin /tmp/main.bin, 0x62060000, 0x1000000
Opening binary file for writing... [/tmp/main.bin]
Reading 16777216 bytes from addr 0x62060000 into file...O.K.
